1. Field of the Invention
The invention relates generally to data storage, and more particularly to systems and methods for reducing malfunctions due to memory cell instability.
2. Related Art
Computer systems and other devices typically need to have means for storing information. These means may include persistent storage devices for large amounts of data, as well as memory systems for storing data that the computer or other device is currently using (i.e., RAM.)
RAM is typically used as the working memory of a device. RAM is used by devices to store data that needs to be accessible by a processor, and also needs to be modifiable. There is a great demand for RAM in computers and other electronic devices because the more RAM a device has, the more data can be readily accessible to the device's processor. For example, in a computer, the availability of more RAM enables the computer to execute more (or larger) software applications without having to swap data between RAM and a persistent storage device, such as a hard disc drive.
There are various different types of RAM. For example, dynamic RAM, or DRAM, has often been used in computers. The “dynamic” aspect of DRAM refers to the fact that DRAM memory cells need to be periodically refreshed in order to maintain the data which is stored in the cells. If the DRAM cells are not refreshed, the data will be lost. Static RAM, or SRAM, is another type of memory that is often used in computers. That “static” aspect of SRAM refers to the fact that SRAM cells do not have to be refreshed in the same manner as DRAM cells.
SRAM memory has a number of advantages over DRAM memory. As noted above, SRAM cells do not have to be refreshed in order to maintain the data that is stored in them. Additionally, SRAM is typically much faster than DRAM. For example, typical SRAM cells may have access times of about less than 1 nanosecond, while DRAM cells may have access times closer to 60 nanoseconds. Further, SRAM memories do not require pauses between accesses, so the cycle time to access SRAM cells is typically much shorter than the cycle time for accessing DRAM cells.
Although it has a number of advantages, SRAM memory also has some disadvantages. For instance, SRAM memory cells may be somewhat unstable. That is, the data in the cells may actually be corrupted when the cells are read. This problem arises from the fact that SRAM cells are read by coupling the cells to pre-charged bit lines and allowing the cells to pull down these bit lines. Just as the SRAM cell pulls the voltages on the bit lines down, the bit lines pull the voltages of the SRAM cells up. A low voltage corresponding to a “0” stored in the cell may be pulled up high enough that the data in the cell may be ambiguous, or may flip-flop so that the “0” becomes a “1.”
The problem of instability in SRAM memory cells is aggravated by the scaling of memory devices. As semiconductor technologies advance and it becomes possible to make circuit components such as transistors smaller, the components may have greater variations in their characteristics. Transistors in particular experience greater variations in characteristics such as threshold voltage. There is therefore a greater likelihood that the individual transistors that make up a typical SRAM memory cell will not be identical to each other. As a result, the transistors (which are typically configured somewhat symmetrically) may not operate identically, and the cell may become unstable.
The instability of SRAM memory cells is further aggravated by increases in the speed at which the memory cells are operated. Because the demand for greater processing power, the speeds at which data processors and memories are operated are constantly increasing. This may cause problems in SRAM cells because, as these cells are operated at higher speeds/frequencies, less time is available during write operations to pull the voltages of the cells to the appropriate levels (i.e., to write data to the cells.) It may therefore take longer for voltage levels within the cells to stabilize. Until these voltage levels stabilize, the cells may be susceptible to data corruption caused by subsequent read operations.
It would therefore be desirable to provide systems and/or methods for reducing or eliminating data corruption that may be caused by read operations on memory cells in which voltage levels corresponding to the data stored therein have not yet stabilized.